// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-avr.go from ATmega16HVBrevB.atdf, see http://packs.download.atmel.com/

//go:build avr && atmega16hvbrevb

// Device information for the ATmega16HVBrevB.
package avr

import (
	"runtime/volatile"
	"unsafe"
)

// Some information about this device.
const (
	DEVICE = "ATmega16HVBrevB"
	ARCH   = "AVR8"
	FAMILY = "megaAVR"
)

// Interrupts
const (
	IRQ_RESET         = 0  // External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset
	IRQ_BPINT         = 1  // Battery Protection Interrupt
	IRQ_VREGMON       = 2  // Voltage regulator monitor interrupt
	IRQ_INT0          = 3  // External Interrupt Request 0
	IRQ_INT1          = 4  // External Interrupt Request 1
	IRQ_INT2          = 5  // External Interrupt Request 2
	IRQ_INT3          = 6  // External Interrupt Request 3
	IRQ_PCINT0        = 7  // Pin Change Interrupt 0
	IRQ_PCINT1        = 8  // Pin Change Interrupt 1
	IRQ_WDT           = 9  // Watchdog Timeout Interrupt
	IRQ_BGSCD         = 10 // Bandgap Buffer Short Circuit Detected
	IRQ_CHDET         = 11 // Charger Detect
	IRQ_TIMER1_IC     = 12 // Timer 1 Input capture
	IRQ_TIMER1_COMPA  = 13 // Timer 1 Compare Match A
	IRQ_TIMER1_COMPB  = 14 // Timer 1 Compare Match B
	IRQ_TIMER1_OVF    = 15 // Timer 1 overflow
	IRQ_TIMER0_IC     = 16 // Timer 0 Input Capture
	IRQ_TIMER0_COMPA  = 17 // Timer 0 Comapre Match A
	IRQ_TIMER0_COMPB  = 18 // Timer 0 Compare Match B
	IRQ_TIMER0_OVF    = 19 // Timer 0 Overflow
	IRQ_TWIBUSCD      = 20 // Two-Wire Bus Connect/Disconnect
	IRQ_TWI           = 21 // Two-Wire Serial Interface
	IRQ_SPI_STC       = 22 // SPI Serial transfer complete
	IRQ_VADC          = 23 // Voltage ADC Conversion Complete
	IRQ_CCADC_CONV    = 24 // Coulomb Counter ADC Conversion Complete
	IRQ_CCADC_REG_CUR = 25 // Coloumb Counter ADC Regular Current
	IRQ_CCADC_ACC     = 26 // Coloumb Counter ADC Accumulator
	IRQ_EE_READY      = 27 // EEPROM Ready
	IRQ_SPM           = 28 // SPM Ready
	IRQ_max           = 28 // Highest interrupt number on this device.
)

// Pseudo function call that is replaced by the compiler with the actual
// functions registered through interrupt.New.
//
//go:linkname callHandlers runtime/interrupt.callHandlers
func callHandlers(num int)

//export __vector_RESET
//go:interrupt
func interruptRESET() {
	callHandlers(IRQ_RESET)
}

//export __vector_BPINT
//go:interrupt
func interruptBPINT() {
	callHandlers(IRQ_BPINT)
}

//export __vector_VREGMON
//go:interrupt
func interruptVREGMON() {
	callHandlers(IRQ_VREGMON)
}

//export __vector_INT0
//go:interrupt
func interruptINT0() {
	callHandlers(IRQ_INT0)
}

//export __vector_INT1
//go:interrupt
func interruptINT1() {
	callHandlers(IRQ_INT1)
}

//export __vector_INT2
//go:interrupt
func interruptINT2() {
	callHandlers(IRQ_INT2)
}

//export __vector_INT3
//go:interrupt
func interruptINT3() {
	callHandlers(IRQ_INT3)
}

//export __vector_PCINT0
//go:interrupt
func interruptPCINT0() {
	callHandlers(IRQ_PCINT0)
}

//export __vector_PCINT1
//go:interrupt
func interruptPCINT1() {
	callHandlers(IRQ_PCINT1)
}

//export __vector_WDT
//go:interrupt
func interruptWDT() {
	callHandlers(IRQ_WDT)
}

//export __vector_BGSCD
//go:interrupt
func interruptBGSCD() {
	callHandlers(IRQ_BGSCD)
}

//export __vector_CHDET
//go:interrupt
func interruptCHDET() {
	callHandlers(IRQ_CHDET)
}

//export __vector_TIMER1_IC
//go:interrupt
func interruptTIMER1_IC() {
	callHandlers(IRQ_TIMER1_IC)
}

//export __vector_TIMER1_COMPA
//go:interrupt
func interruptTIMER1_COMPA() {
	callHandlers(IRQ_TIMER1_COMPA)
}

//export __vector_TIMER1_COMPB
//go:interrupt
func interruptTIMER1_COMPB() {
	callHandlers(IRQ_TIMER1_COMPB)
}

//export __vector_TIMER1_OVF
//go:interrupt
func interruptTIMER1_OVF() {
	callHandlers(IRQ_TIMER1_OVF)
}

//export __vector_TIMER0_IC
//go:interrupt
func interruptTIMER0_IC() {
	callHandlers(IRQ_TIMER0_IC)
}

//export __vector_TIMER0_COMPA
//go:interrupt
func interruptTIMER0_COMPA() {
	callHandlers(IRQ_TIMER0_COMPA)
}

//export __vector_TIMER0_COMPB
//go:interrupt
func interruptTIMER0_COMPB() {
	callHandlers(IRQ_TIMER0_COMPB)
}

//export __vector_TIMER0_OVF
//go:interrupt
func interruptTIMER0_OVF() {
	callHandlers(IRQ_TIMER0_OVF)
}

//export __vector_TWIBUSCD
//go:interrupt
func interruptTWIBUSCD() {
	callHandlers(IRQ_TWIBUSCD)
}

//export __vector_TWI
//go:interrupt
func interruptTWI() {
	callHandlers(IRQ_TWI)
}

//export __vector_SPI_STC
//go:interrupt
func interruptSPI_STC() {
	callHandlers(IRQ_SPI_STC)
}

//export __vector_VADC
//go:interrupt
func interruptVADC() {
	callHandlers(IRQ_VADC)
}

//export __vector_CCADC_CONV
//go:interrupt
func interruptCCADC_CONV() {
	callHandlers(IRQ_CCADC_CONV)
}

//export __vector_CCADC_REG_CUR
//go:interrupt
func interruptCCADC_REG_CUR() {
	callHandlers(IRQ_CCADC_REG_CUR)
}

//export __vector_CCADC_ACC
//go:interrupt
func interruptCCADC_ACC() {
	callHandlers(IRQ_CCADC_ACC)
}

//export __vector_EE_READY
//go:interrupt
func interruptEE_READY() {
	callHandlers(IRQ_EE_READY)
}

//export __vector_SPM
//go:interrupt
func interruptSPM() {
	callHandlers(IRQ_SPM)
}

// Peripherals.
var (
	// Analog-to-Digital Converter
	VADMUX = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7c)))
	VADCL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x78)))
	VADCH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x79)))
	VADCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7a)))

	// Watchdog Timer
	WDTCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x60)))

	// FET Control
	FCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf0)))

	// Serial Peripheral Interface
	SPCR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4c)))
	SPSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4d)))
	SPDR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4e)))

	// EEPROM
	EEARL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x41)))
	EEARH = (*volatile.Register8)(unsafe.Pointer(uintptr(0x42)))
	EEDR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x40)))
	EECR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3f)))

	// Coulomb Counter
	CADCSRA = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe6)))
	CADCSRB = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe7)))
	CADCSRC = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe8)))
	CADICL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe4)))
	CADICH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe5)))
	CADAC3  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe3)))
	CADAC2  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe2)))
	CADAC1  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe1)))
	CADAC0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe0)))
	CADRCC  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe9)))
	CADRDC  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xea)))

	// Two Wire Serial Interface
	TWBCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xbe)))
	TWAMR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xbd)))
	TWBR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb8)))
	TWCR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xbc)))
	TWSR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb9)))
	TWDR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xbb)))
	TWAR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xba)))

	// External Interrupts
	EICRA  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x69)))
	EIMSK  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3d)))
	EIFR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3c)))
	PCICR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x68)))
	PCIFR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3b)))
	PCMSK1 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6c)))
	PCMSK0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6b)))

	// Timer/Counter, 16-bit
	TCCR1B = (*volatile.Register8)(unsafe.Pointer(uintptr(0x81)))
	TCCR1A = (*volatile.Register8)(unsafe.Pointer(uintptr(0x80)))
	TCNT1L = (*volatile.Register8)(unsafe.Pointer(uintptr(0x84)))
	TCNT1H = (*volatile.Register8)(unsafe.Pointer(uintptr(0x85)))
	OCR1A  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x88)))
	OCR1B  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x89)))
	TIMSK1 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6f)))
	TIFR1  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x36)))
	GTCCR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x43)))

	// Timer/Counter, 16-bit
	TCCR0B = (*volatile.Register8)(unsafe.Pointer(uintptr(0x45)))
	TCCR0A = (*volatile.Register8)(unsafe.Pointer(uintptr(0x44)))
	TCNT0L = (*volatile.Register8)(unsafe.Pointer(uintptr(0x46)))
	TCNT0H = (*volatile.Register8)(unsafe.Pointer(uintptr(0x47)))
	OCR0A  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x48)))
	OCR0B  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x49)))
	TIMSK0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6e)))
	TIFR0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x35)))

	// Cell Balancing
	CBCR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf1)))

	// Battery Protection
	BPPLR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xfe)))
	BPCR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xfd)))
	BPHCTR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xfc)))
	BPOCTR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xfb)))
	BPSCTR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xfa)))
	BPCHCD = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf9)))
	BPDHCD = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf8)))
	BPCOCD = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf7)))
	BPDOCD = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf6)))
	BPSCD  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf5)))
	BPIFR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf3)))
	BPIMSK = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf2)))

	// Charger Detect
	CHGDCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd4)))

	// Voltage Regulator
	ROCR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc8)))

	// Bandgap
	BGCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd2)))
	BGCRR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd1)))
	BGCCR = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd0)))

	// CPU Registers
	SREG    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5f)))
	SPL     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5d)))
	SPH     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5e)))
	MCUCR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x55)))
	MCUSR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x54)))
	FOSCCAL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x66)))
	OSICSR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x37)))
	SMCR    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x53)))
	GPIOR2  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4b)))
	GPIOR1  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4a)))
	GPIOR0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3e)))
	DIDR0   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7e)))
	PRR0    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x64)))
	CLKPR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x61)))

	// I/O Port
	PORTA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x22)))
	DDRA  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x21)))
	PINA  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x20)))

	// I/O Port
	PORTB = (*volatile.Register8)(unsafe.Pointer(uintptr(0x25)))
	DDRB  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x24)))
	PINB  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x23)))

	// I/O Port
	PORTC = (*volatile.Register8)(unsafe.Pointer(uintptr(0x28)))
	PINC  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x26)))

	// Bootloader
	SPMCSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x57)))

	// Fuses
	LOW  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	HIGH = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))

	// Lockbits
	LOCKBIT = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
)

// Bitfields for FUSE: Fuses
const (
	// LOW
	LOW_WDTON      = 0x80 // Watch-dog Timer always on
	LOW_WDTON_Msk  = 0x80 // Watch-dog Timer always on
	LOW_EESAVE     = 0x40 // Preserve EEPROM through the Chip Erase cycle
	LOW_EESAVE_Msk = 0x40 // Preserve EEPROM through the Chip Erase cycle
	LOW_SPIEN      = 0x20 // Serial program downloading (SPI) enabled
	LOW_SPIEN_Msk  = 0x20 // Serial program downloading (SPI) enabled
	LOW_SUT0       = 0x4  // Select start-up time
	LOW_SUT1       = 0x8  // Select start-up time
	LOW_SUT2       = 0x10 // Select start-up time
	LOW_SUT_Msk    = 0x1c // Select start-up time
	LOW_OSCSEL0    = 0x1  // Oscillator select
	LOW_OSCSEL1    = 0x2  // Oscillator select
	LOW_OSCSEL_Msk = 0x3  // Oscillator select

	// HIGH
	HIGH_DUVRDINIT     = 0x10 // DUVR mode on
	HIGH_DUVRDINIT_Msk = 0x10 // DUVR mode on
	HIGH_DWEN          = 0x8  // Debug Wire enable
	HIGH_DWEN_Msk      = 0x8  // Debug Wire enable
	HIGH_BOOTSZ0       = 0x2  // Select Boot Size
	HIGH_BOOTSZ1       = 0x4  // Select Boot Size
	HIGH_BOOTSZ_Msk    = 0x6  // Select Boot Size
	HIGH_BOOTRST       = 0x1  // Boot Reset vector Enabled
	HIGH_BOOTRST_Msk   = 0x1  // Boot Reset vector Enabled
)

// Bitfields for LOCKBIT: Lockbits
const (
	// LOCKBIT
	LOCKBIT_LB0      = 0x1  // Memory Lock
	LOCKBIT_LB1      = 0x2  // Memory Lock
	LOCKBIT_LB_Msk   = 0x3  // Memory Lock
	LOCKBIT_BLB00    = 0x4  // Boot Loader Protection Mode
	LOCKBIT_BLB01    = 0x8  // Boot Loader Protection Mode
	LOCKBIT_BLB0_Msk = 0xc  // Boot Loader Protection Mode
	LOCKBIT_BLB10    = 0x10 // Boot Loader Protection Mode
	LOCKBIT_BLB11    = 0x20 // Boot Loader Protection Mode
	LOCKBIT_BLB1_Msk = 0x30 // Boot Loader Protection Mode
)

// Bitfields for ADC: Analog-to-Digital Converter
const (
	// VADMUX: The VADC multiplexer Selection Register
	VADMUX_VADMUX0    = 0x1 // Analog Channel and Gain Selection Bits
	VADMUX_VADMUX1    = 0x2 // Analog Channel and Gain Selection Bits
	VADMUX_VADMUX2    = 0x4 // Analog Channel and Gain Selection Bits
	VADMUX_VADMUX3    = 0x8 // Analog Channel and Gain Selection Bits
	VADMUX_VADMUX_Msk = 0xf // Analog Channel and Gain Selection Bits

	// VADCSR: The VADC Control and Status register
	VADCSR_VADEN       = 0x8 // VADC Enable
	VADCSR_VADEN_Msk   = 0x8 // VADC Enable
	VADCSR_VADSC       = 0x4 // VADC Satrt Conversion
	VADCSR_VADSC_Msk   = 0x4 // VADC Satrt Conversion
	VADCSR_VADCCIF     = 0x2 // VADC Conversion Complete Interrupt Flag
	VADCSR_VADCCIF_Msk = 0x2 // VADC Conversion Complete Interrupt Flag
	VADCSR_VADCCIE     = 0x1 // VADC Conversion Complete Interrupt Enable
	VADCSR_VADCCIE_Msk = 0x1 // VADC Conversion Complete Interrupt Enable
)

// Bitfields for WDT: Watchdog Timer
const (
	// WDTCSR: Watchdog Timer Control Register
	WDTCSR_WDIF     = 0x80 // Watchdog Timeout Interrupt Flag
	WDTCSR_WDIF_Msk = 0x80 // Watchdog Timeout Interrupt Flag
	WDTCSR_WDIE     = 0x40 // Watchdog Timeout Interrupt Enable
	WDTCSR_WDIE_Msk = 0x40 // Watchdog Timeout Interrupt Enable
	WDTCSR_WDP0     = 0x1  // Watchdog Timer Prescaler Bits
	WDTCSR_WDP1     = 0x2  // Watchdog Timer Prescaler Bits
	WDTCSR_WDP2     = 0x4  // Watchdog Timer Prescaler Bits
	WDTCSR_WDP3     = 0x20 // Watchdog Timer Prescaler Bits
	WDTCSR_WDP_Msk  = 0x27 // Watchdog Timer Prescaler Bits
	WDTCSR_WDCE     = 0x10 // Watchdog Change Enable
	WDTCSR_WDCE_Msk = 0x10 // Watchdog Change Enable
	WDTCSR_WDE      = 0x8  // Watch Dog Enable
	WDTCSR_WDE_Msk  = 0x8  // Watch Dog Enable
)

// Bitfields for FET: FET Control
const (
	// FCSR: FET Control and Status Register
	FCSR_DUVRD     = 0x8 // Deep Under-Voltage Recovery Disable
	FCSR_DUVRD_Msk = 0x8 // Deep Under-Voltage Recovery Disable
	FCSR_CPS       = 0x4 // Current Protection Status
	FCSR_CPS_Msk   = 0x4 // Current Protection Status
	FCSR_DFE       = 0x2 // Discharge FET Enable
	FCSR_DFE_Msk   = 0x2 // Discharge FET Enable
	FCSR_CFE       = 0x1 // Charge FET Enable
	FCSR_CFE_Msk   = 0x1 // Charge FET Enable
)

// Bitfields for SPI: Serial Peripheral Interface
const (
	// SPCR: SPI Control Register
	SPCR_SPIE     = 0x80 // SPI Interrupt Enable
	SPCR_SPIE_Msk = 0x80 // SPI Interrupt Enable
	SPCR_SPE      = 0x40 // SPI Enable
	SPCR_SPE_Msk  = 0x40 // SPI Enable
	SPCR_DORD     = 0x20 // Data Order
	SPCR_DORD_Msk = 0x20 // Data Order
	SPCR_MSTR     = 0x10 // Master/Slave Select
	SPCR_MSTR_Msk = 0x10 // Master/Slave Select
	SPCR_CPOL     = 0x8  // Clock polarity
	SPCR_CPOL_Msk = 0x8  // Clock polarity
	SPCR_CPHA     = 0x4  // Clock Phase
	SPCR_CPHA_Msk = 0x4  // Clock Phase
	SPCR_SPR0     = 0x1  // SPI Clock Rate Selects
	SPCR_SPR1     = 0x2  // SPI Clock Rate Selects
	SPCR_SPR_Msk  = 0x3  // SPI Clock Rate Selects

	// SPSR: SPI Status Register
	SPSR_SPIF      = 0x80 // SPI Interrupt Flag
	SPSR_SPIF_Msk  = 0x80 // SPI Interrupt Flag
	SPSR_WCOL      = 0x40 // Write Collision Flag
	SPSR_WCOL_Msk  = 0x40 // Write Collision Flag
	SPSR_SPI2X     = 0x1  // Double SPI Speed Bit
	SPSR_SPI2X_Msk = 0x1  // Double SPI Speed Bit

	// SPDR: SPI Data Register
	SPDR_SPDR0    = 0x1  // SPI Data bits
	SPDR_SPDR1    = 0x2  // SPI Data bits
	SPDR_SPDR2    = 0x4  // SPI Data bits
	SPDR_SPDR3    = 0x8  // SPI Data bits
	SPDR_SPDR4    = 0x10 // SPI Data bits
	SPDR_SPDR5    = 0x20 // SPI Data bits
	SPDR_SPDR6    = 0x40 // SPI Data bits
	SPDR_SPDR7    = 0x80 // SPI Data bits
	SPDR_SPDR_Msk = 0xff // SPI Data bits
)

// Bitfields for EEPROM: EEPROM
const (
	// EEDR: EEPROM Data Register
	EEDR_EEDR0    = 0x1  // EEPROM Data bits
	EEDR_EEDR1    = 0x2  // EEPROM Data bits
	EEDR_EEDR2    = 0x4  // EEPROM Data bits
	EEDR_EEDR3    = 0x8  // EEPROM Data bits
	EEDR_EEDR4    = 0x10 // EEPROM Data bits
	EEDR_EEDR5    = 0x20 // EEPROM Data bits
	EEDR_EEDR6    = 0x40 // EEPROM Data bits
	EEDR_EEDR7    = 0x80 // EEPROM Data bits
	EEDR_EEDR_Msk = 0xff // EEPROM Data bits

	// EECR: EEPROM Control Register
	EECR_EEPM0     = 0x10
	EECR_EEPM1     = 0x20
	EECR_EEPM_Msk  = 0x30
	EECR_EERIE     = 0x8 // EEProm Ready Interrupt Enable
	EECR_EERIE_Msk = 0x8 // EEProm Ready Interrupt Enable
	EECR_EEMPE     = 0x4 // EEPROM Master Write Enable
	EECR_EEMPE_Msk = 0x4 // EEPROM Master Write Enable
	EECR_EEPE      = 0x2 // EEPROM Write Enable
	EECR_EEPE_Msk  = 0x2 // EEPROM Write Enable
	EECR_EERE      = 0x1 // EEPROM Read Enable
	EECR_EERE_Msk  = 0x1 // EEPROM Read Enable
)

// Bitfields for COULOMB_COUNTER: Coulomb Counter
const (
	// CADCSRA: CC-ADC Control and Status Register A
	CADCSRA_CADEN      = 0x80 // When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled.
	CADCSRA_CADEN_Msk  = 0x80 // When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled.
	CADCSRA_CADPOL     = 0x40
	CADCSRA_CADPOL_Msk = 0x40
	CADCSRA_CADUB      = 0x20 // CC_ADC Update Busy
	CADCSRA_CADUB_Msk  = 0x20 // CC_ADC Update Busy
	CADCSRA_CADAS0     = 0x8  // CC_ADC Accumulate Current Select Bits
	CADCSRA_CADAS1     = 0x10 // CC_ADC Accumulate Current Select Bits
	CADCSRA_CADAS_Msk  = 0x18 // CC_ADC Accumulate Current Select Bits
	CADCSRA_CADSI0     = 0x2  // The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined.
	CADCSRA_CADSI1     = 0x4  // The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined.
	CADCSRA_CADSI_Msk  = 0x6  // The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined.
	CADCSRA_CADSE      = 0x1  // When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode.
	CADCSRA_CADSE_Msk  = 0x1  // When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode.

	// CADCSRB: CC-ADC Control and Status Register B
	CADCSRB_CADACIE     = 0x40
	CADCSRB_CADACIE_Msk = 0x40
	CADCSRB_CADRCIE     = 0x20 // Regular Current Interrupt Enable
	CADCSRB_CADRCIE_Msk = 0x20 // Regular Current Interrupt Enable
	CADCSRB_CADICIE     = 0x10 // CAD Instantenous Current Interrupt Enable
	CADCSRB_CADICIE_Msk = 0x10 // CAD Instantenous Current Interrupt Enable
	CADCSRB_CADACIF     = 0x4  // CC-ADC Accumulate Current Interrupt Flag
	CADCSRB_CADACIF_Msk = 0x4  // CC-ADC Accumulate Current Interrupt Flag
	CADCSRB_CADRCIF     = 0x2  // CC-ADC Accumulate Current Interrupt Flag
	CADCSRB_CADRCIF_Msk = 0x2  // CC-ADC Accumulate Current Interrupt Flag
	CADCSRB_CADICIF     = 0x1  // CC-ADC Instantaneous Current Interrupt Flag
	CADCSRB_CADICIF_Msk = 0x1  // CC-ADC Instantaneous Current Interrupt Flag

	// CADCSRC: CC-ADC Control and Status Register C
	CADCSRC_CADVSE     = 0x1 // CC-ADC Voltage Scaling Enable
	CADCSRC_CADVSE_Msk = 0x1 // CC-ADC Voltage Scaling Enable

	// CADAC3: ADC Accumulate Current
	CADAC3_CADAC0    = 0x1  // ADC accumulate current bits
	CADAC3_CADAC1    = 0x2  // ADC accumulate current bits
	CADAC3_CADAC2    = 0x4  // ADC accumulate current bits
	CADAC3_CADAC3    = 0x8  // ADC accumulate current bits
	CADAC3_CADAC4    = 0x10 // ADC accumulate current bits
	CADAC3_CADAC5    = 0x20 // ADC accumulate current bits
	CADAC3_CADAC6    = 0x40 // ADC accumulate current bits
	CADAC3_CADAC7    = 0x80 // ADC accumulate current bits
	CADAC3_CADAC_Msk = 0xff // ADC accumulate current bits

	// CADAC2: ADC Accumulate Current
	CADAC2_CADAC0    = 0x1  // ADC accumulate current bits
	CADAC2_CADAC1    = 0x2  // ADC accumulate current bits
	CADAC2_CADAC2    = 0x4  // ADC accumulate current bits
	CADAC2_CADAC3    = 0x8  // ADC accumulate current bits
	CADAC2_CADAC4    = 0x10 // ADC accumulate current bits
	CADAC2_CADAC5    = 0x20 // ADC accumulate current bits
	CADAC2_CADAC6    = 0x40 // ADC accumulate current bits
	CADAC2_CADAC7    = 0x80 // ADC accumulate current bits
	CADAC2_CADAC_Msk = 0xff // ADC accumulate current bits

	// CADAC1: ADC Accumulate Current
	CADAC1_CADAC0     = 0x4  // ADC accumulate current bits
	CADAC1_CADAC1     = 0x8  // ADC accumulate current bits
	CADAC1_CADAC2     = 0x10 // ADC accumulate current bits
	CADAC1_CADAC3     = 0x20 // ADC accumulate current bits
	CADAC1_CADAC4     = 0x40 // ADC accumulate current bits
	CADAC1_CADAC5     = 0x80 // ADC accumulate current bits
	CADAC1_CADAC_Msk  = 0xfc // ADC accumulate current bits
	CADAC1_CADAC00    = 0x1  // ADC accumulate current bits
	CADAC1_CADAC01    = 0x2  // ADC accumulate current bits
	CADAC1_CADAC0_Msk = 0x3  // ADC accumulate current bits

	// CADAC0: ADC Accumulate Current
	CADAC0_CADAC00    = 0x1  // ADC accumulate current bits
	CADAC0_CADAC01    = 0x2  // ADC accumulate current bits
	CADAC0_CADAC02    = 0x4  // ADC accumulate current bits
	CADAC0_CADAC03    = 0x8  // ADC accumulate current bits
	CADAC0_CADAC04    = 0x10 // ADC accumulate current bits
	CADAC0_CADAC05    = 0x20 // ADC accumulate current bits
	CADAC0_CADAC06    = 0x40 // ADC accumulate current bits
	CADAC0_CADAC07    = 0x80 // ADC accumulate current bits
	CADAC0_CADAC0_Msk = 0xff // ADC accumulate current bits

	// CADRCC: CC-ADC Regular Charge Current
	CADRCC_CADRCC0    = 0x1  // CC-ADC Regular Charge Current
	CADRCC_CADRCC1    = 0x2  // CC-ADC Regular Charge Current
	CADRCC_CADRCC2    = 0x4  // CC-ADC Regular Charge Current
	CADRCC_CADRCC3    = 0x8  // CC-ADC Regular Charge Current
	CADRCC_CADRCC4    = 0x10 // CC-ADC Regular Charge Current
	CADRCC_CADRCC5    = 0x20 // CC-ADC Regular Charge Current
	CADRCC_CADRCC6    = 0x40 // CC-ADC Regular Charge Current
	CADRCC_CADRCC7    = 0x80 // CC-ADC Regular Charge Current
	CADRCC_CADRCC_Msk = 0xff // CC-ADC Regular Charge Current

	// CADRDC: CC-ADC Regular Discharge Current
	CADRDC_CADRDC0    = 0x1  // CC-ADC Regular Discharge Current
	CADRDC_CADRDC1    = 0x2  // CC-ADC Regular Discharge Current
	CADRDC_CADRDC2    = 0x4  // CC-ADC Regular Discharge Current
	CADRDC_CADRDC3    = 0x8  // CC-ADC Regular Discharge Current
	CADRDC_CADRDC4    = 0x10 // CC-ADC Regular Discharge Current
	CADRDC_CADRDC5    = 0x20 // CC-ADC Regular Discharge Current
	CADRDC_CADRDC6    = 0x40 // CC-ADC Regular Discharge Current
	CADRDC_CADRDC7    = 0x80 // CC-ADC Regular Discharge Current
	CADRDC_CADRDC_Msk = 0xff // CC-ADC Regular Discharge Current
)

// Bitfields for TWI: Two Wire Serial Interface
const (
	// TWBCSR: TWI Bus Control and Status Register
	TWBCSR_TWBCIF     = 0x80 // TWI Bus Connect/Disconnect Interrupt Flag
	TWBCSR_TWBCIF_Msk = 0x80 // TWI Bus Connect/Disconnect Interrupt Flag
	TWBCSR_TWBCIE     = 0x40 // TWI Bus Connect/Disconnect Interrupt Enable
	TWBCSR_TWBCIE_Msk = 0x40 // TWI Bus Connect/Disconnect Interrupt Enable
	TWBCSR_TWBDT0     = 0x2  // TWI Bus Disconnect Time-out Period
	TWBCSR_TWBDT1     = 0x4  // TWI Bus Disconnect Time-out Period
	TWBCSR_TWBDT_Msk  = 0x6  // TWI Bus Disconnect Time-out Period
	TWBCSR_TWBCIP     = 0x1  // TWI Bus Connect/Disconnect Interrupt Polarity
	TWBCSR_TWBCIP_Msk = 0x1  // TWI Bus Connect/Disconnect Interrupt Polarity

	// TWAMR: TWI (Slave) Address Mask Register
	TWAMR_TWAM0    = 0x2
	TWAMR_TWAM1    = 0x4
	TWAMR_TWAM2    = 0x8
	TWAMR_TWAM3    = 0x10
	TWAMR_TWAM4    = 0x20
	TWAMR_TWAM5    = 0x40
	TWAMR_TWAM6    = 0x80
	TWAMR_TWAM_Msk = 0xfe

	// TWBR: TWI Bit Rate register
	TWBR_TWBR0    = 0x1  // TWI Bit Rate bits
	TWBR_TWBR1    = 0x2  // TWI Bit Rate bits
	TWBR_TWBR2    = 0x4  // TWI Bit Rate bits
	TWBR_TWBR3    = 0x8  // TWI Bit Rate bits
	TWBR_TWBR4    = 0x10 // TWI Bit Rate bits
	TWBR_TWBR5    = 0x20 // TWI Bit Rate bits
	TWBR_TWBR6    = 0x40 // TWI Bit Rate bits
	TWBR_TWBR7    = 0x80 // TWI Bit Rate bits
	TWBR_TWBR_Msk = 0xff // TWI Bit Rate bits

	// TWCR: TWI Control Register
	TWCR_TWINT     = 0x80 // TWI Interrupt Flag
	TWCR_TWINT_Msk = 0x80 // TWI Interrupt Flag
	TWCR_TWEA      = 0x40 // TWI Enable Acknowledge Bit
	TWCR_TWEA_Msk  = 0x40 // TWI Enable Acknowledge Bit
	TWCR_TWSTA     = 0x20 // TWI Start Condition Bit
	TWCR_TWSTA_Msk = 0x20 // TWI Start Condition Bit
	TWCR_TWSTO     = 0x10 // TWI Stop Condition Bit
	TWCR_TWSTO_Msk = 0x10 // TWI Stop Condition Bit
	TWCR_TWWC      = 0x8  // TWI Write Collition Flag
	TWCR_TWWC_Msk  = 0x8  // TWI Write Collition Flag
	TWCR_TWEN      = 0x4  // TWI Enable Bit
	TWCR_TWEN_Msk  = 0x4  // TWI Enable Bit
	TWCR_TWIE      = 0x1  // TWI Interrupt Enable
	TWCR_TWIE_Msk  = 0x1  // TWI Interrupt Enable

	// TWSR: TWI Status Register
	TWSR_TWS0     = 0x8  // TWI Status
	TWSR_TWS1     = 0x10 // TWI Status
	TWSR_TWS2     = 0x20 // TWI Status
	TWSR_TWS3     = 0x40 // TWI Status
	TWSR_TWS4     = 0x80 // TWI Status
	TWSR_TWS_Msk  = 0xf8 // TWI Status
	TWSR_TWPS0    = 0x1  // TWI Prescaler
	TWSR_TWPS1    = 0x2  // TWI Prescaler
	TWSR_TWPS_Msk = 0x3  // TWI Prescaler

	// TWDR: TWI Data register
	TWDR_TWD0    = 0x1  // TWI Data Bits
	TWDR_TWD1    = 0x2  // TWI Data Bits
	TWDR_TWD2    = 0x4  // TWI Data Bits
	TWDR_TWD3    = 0x8  // TWI Data Bits
	TWDR_TWD4    = 0x10 // TWI Data Bits
	TWDR_TWD5    = 0x20 // TWI Data Bits
	TWDR_TWD6    = 0x40 // TWI Data Bits
	TWDR_TWD7    = 0x80 // TWI Data Bits
	TWDR_TWD_Msk = 0xff // TWI Data Bits

	// TWAR: TWI (Slave) Address register
	TWAR_TWA0      = 0x2  // TWI (Slave) Address register Bits
	TWAR_TWA1      = 0x4  // TWI (Slave) Address register Bits
	TWAR_TWA2      = 0x8  // TWI (Slave) Address register Bits
	TWAR_TWA3      = 0x10 // TWI (Slave) Address register Bits
	TWAR_TWA4      = 0x20 // TWI (Slave) Address register Bits
	TWAR_TWA5      = 0x40 // TWI (Slave) Address register Bits
	TWAR_TWA6      = 0x80 // TWI (Slave) Address register Bits
	TWAR_TWA_Msk   = 0xfe // TWI (Slave) Address register Bits
	TWAR_TWGCE     = 0x1  // TWI General Call Recognition Enable Bit
	TWAR_TWGCE_Msk = 0x1  // TWI General Call Recognition Enable Bit
)

// Bitfields for EXINT: External Interrupts
const (
	// EICRA: External Interrupt Control Register
	EICRA_ISC30    = 0x40 // External Interrupt Sense Control 3 Bits
	EICRA_ISC31    = 0x80 // External Interrupt Sense Control 3 Bits
	EICRA_ISC3_Msk = 0xc0 // External Interrupt Sense Control 3 Bits
	EICRA_ISC20    = 0x10 // External Interrupt Sense Control 2 Bits
	EICRA_ISC21    = 0x20 // External Interrupt Sense Control 2 Bits
	EICRA_ISC2_Msk = 0x30 // External Interrupt Sense Control 2 Bits
	EICRA_ISC10    = 0x4  // External Interrupt Sense Control 1 Bits
	EICRA_ISC11    = 0x8  // External Interrupt Sense Control 1 Bits
	EICRA_ISC1_Msk = 0xc  // External Interrupt Sense Control 1 Bits
	EICRA_ISC00    = 0x1  // External Interrupt Sense Control 0 Bits
	EICRA_ISC01    = 0x2  // External Interrupt Sense Control 0 Bits
	EICRA_ISC0_Msk = 0x3  // External Interrupt Sense Control 0 Bits

	// EIMSK: External Interrupt Mask Register
	EIMSK_INT0    = 0x1 // External Interrupt Request 3 Enable
	EIMSK_INT1    = 0x2 // External Interrupt Request 3 Enable
	EIMSK_INT2    = 0x4 // External Interrupt Request 3 Enable
	EIMSK_INT3    = 0x8 // External Interrupt Request 3 Enable
	EIMSK_INT_Msk = 0xf // External Interrupt Request 3 Enable

	// EIFR: External Interrupt Flag Register
	EIFR_INTF0    = 0x1 // External Interrupt Flags
	EIFR_INTF1    = 0x2 // External Interrupt Flags
	EIFR_INTF2    = 0x4 // External Interrupt Flags
	EIFR_INTF3    = 0x8 // External Interrupt Flags
	EIFR_INTF_Msk = 0xf // External Interrupt Flags

	// PCICR: Pin Change Interrupt Control Register
	PCICR_PCIE0    = 0x1 // Pin Change Interrupt Enables
	PCICR_PCIE1    = 0x2 // Pin Change Interrupt Enables
	PCICR_PCIE_Msk = 0x3 // Pin Change Interrupt Enables

	// PCIFR: Pin Change Interrupt Flag Register
	PCIFR_PCIF0    = 0x1 // Pin Change Interrupt Flags
	PCIFR_PCIF1    = 0x2 // Pin Change Interrupt Flags
	PCIFR_PCIF_Msk = 0x3 // Pin Change Interrupt Flags

	// PCMSK1: Pin Change Enable Mask Register 1
	PCMSK1_PCINT0    = 0x1  // Pin Change Enable Mask
	PCMSK1_PCINT1    = 0x2  // Pin Change Enable Mask
	PCMSK1_PCINT2    = 0x4  // Pin Change Enable Mask
	PCMSK1_PCINT3    = 0x8  // Pin Change Enable Mask
	PCMSK1_PCINT4    = 0x10 // Pin Change Enable Mask
	PCMSK1_PCINT5    = 0x20 // Pin Change Enable Mask
	PCMSK1_PCINT6    = 0x40 // Pin Change Enable Mask
	PCMSK1_PCINT7    = 0x80 // Pin Change Enable Mask
	PCMSK1_PCINT_Msk = 0xff // Pin Change Enable Mask

	// PCMSK0: Pin Change Enable Mask Register 0
	PCMSK0_PCINT0    = 0x1 // Pin Change Enable Mask
	PCMSK0_PCINT1    = 0x2 // Pin Change Enable Mask
	PCMSK0_PCINT2    = 0x4 // Pin Change Enable Mask
	PCMSK0_PCINT3    = 0x8 // Pin Change Enable Mask
	PCMSK0_PCINT_Msk = 0xf // Pin Change Enable Mask
)

// Bitfields for TC1: Timer/Counter, 16-bit
const (
	// TCCR1B: Timer/Counter1 Control Register B
	TCCR1B_CS0    = 0x1 // Clock Select1 bis
	TCCR1B_CS1    = 0x2 // Clock Select1 bis
	TCCR1B_CS2    = 0x4 // Clock Select1 bis
	TCCR1B_CS_Msk = 0x7 // Clock Select1 bis

	// TCCR1A: Timer/Counter 1 Control Register A
	TCCR1A_TCW1      = 0x80 // Timer/Counter Width
	TCCR1A_TCW1_Msk  = 0x80 // Timer/Counter Width
	TCCR1A_ICEN1     = 0x40 // Input Capture Mode Enable
	TCCR1A_ICEN1_Msk = 0x40 // Input Capture Mode Enable
	TCCR1A_ICNC1     = 0x20 // Input Capture Noise Canceler
	TCCR1A_ICNC1_Msk = 0x20 // Input Capture Noise Canceler
	TCCR1A_ICES1     = 0x10 // Input Capture Edge Select
	TCCR1A_ICES1_Msk = 0x10 // Input Capture Edge Select
	TCCR1A_ICS1      = 0x8  // Input Capture Select
	TCCR1A_ICS1_Msk  = 0x8  // Input Capture Select
	TCCR1A_WGM10     = 0x1  // Waveform Generation Mode
	TCCR1A_WGM10_Msk = 0x1  // Waveform Generation Mode

	// OCR1A: Output Compare Register 1A
	OCR1A_OCR1A0    = 0x1  // Output Compare 1 A bits
	OCR1A_OCR1A1    = 0x2  // Output Compare 1 A bits
	OCR1A_OCR1A2    = 0x4  // Output Compare 1 A bits
	OCR1A_OCR1A3    = 0x8  // Output Compare 1 A bits
	OCR1A_OCR1A4    = 0x10 // Output Compare 1 A bits
	OCR1A_OCR1A5    = 0x20 // Output Compare 1 A bits
	OCR1A_OCR1A6    = 0x40 // Output Compare 1 A bits
	OCR1A_OCR1A7    = 0x80 // Output Compare 1 A bits
	OCR1A_OCR1A_Msk = 0xff // Output Compare 1 A bits

	// OCR1B: Output Compare Register B
	OCR1B_OCR1B0    = 0x1  // Output Compare 1 B bits
	OCR1B_OCR1B1    = 0x2  // Output Compare 1 B bits
	OCR1B_OCR1B2    = 0x4  // Output Compare 1 B bits
	OCR1B_OCR1B3    = 0x8  // Output Compare 1 B bits
	OCR1B_OCR1B4    = 0x10 // Output Compare 1 B bits
	OCR1B_OCR1B5    = 0x20 // Output Compare 1 B bits
	OCR1B_OCR1B6    = 0x40 // Output Compare 1 B bits
	OCR1B_OCR1B7    = 0x80 // Output Compare 1 B bits
	OCR1B_OCR1B_Msk = 0xff // Output Compare 1 B bits

	// TIMSK1: Timer/Counter Interrupt Mask Register
	TIMSK1_ICIE1      = 0x8 // Timer/Counter n Input Capture Interrupt Enable
	TIMSK1_ICIE1_Msk  = 0x8 // Timer/Counter n Input Capture Interrupt Enable
	TIMSK1_OCIE1B     = 0x4 // Timer/Counter1 Output Compare B Interrupt Enable
	TIMSK1_OCIE1B_Msk = 0x4 // Timer/Counter1 Output Compare B Interrupt Enable
	TIMSK1_OCIE1A     = 0x2 // Timer/Counter1 Output Compare A Interrupt Enable
	TIMSK1_OCIE1A_Msk = 0x2 // Timer/Counter1 Output Compare A Interrupt Enable
	TIMSK1_TOIE1      = 0x1 // Timer/Counter1 Overflow Interrupt Enable
	TIMSK1_TOIE1_Msk  = 0x1 // Timer/Counter1 Overflow Interrupt Enable

	// TIFR1: Timer/Counter Interrupt Flag register
	TIFR1_ICF1      = 0x8 // Timer/Counter 1 Input Capture Flag
	TIFR1_ICF1_Msk  = 0x8 // Timer/Counter 1 Input Capture Flag
	TIFR1_OCF1B     = 0x4 // Timer/Counter1 Output Compare Flag B
	TIFR1_OCF1B_Msk = 0x4 // Timer/Counter1 Output Compare Flag B
	TIFR1_OCF1A     = 0x2 // Timer/Counter1 Output Compare Flag A
	TIFR1_OCF1A_Msk = 0x2 // Timer/Counter1 Output Compare Flag A
	TIFR1_TOV1      = 0x1 // Timer/Counter1 Overflow Flag
	TIFR1_TOV1_Msk  = 0x1 // Timer/Counter1 Overflow Flag

	// GTCCR: General Timer/Counter Control Register
	GTCCR_TSM         = 0x80 // Timer/Counter Synchronization Mode
	GTCCR_TSM_Msk     = 0x80 // Timer/Counter Synchronization Mode
	GTCCR_PSRSYNC     = 0x1  // Prescaler Reset
	GTCCR_PSRSYNC_Msk = 0x1  // Prescaler Reset
)

// Bitfields for TC0: Timer/Counter, 16-bit
const (
	// TCCR0B: Timer/Counter0 Control Register B
	TCCR0B_CS02     = 0x4 // Clock Select0 bit 2
	TCCR0B_CS02_Msk = 0x4 // Clock Select0 bit 2
	TCCR0B_CS01     = 0x2 // Clock Select0 bit 1
	TCCR0B_CS01_Msk = 0x2 // Clock Select0 bit 1
	TCCR0B_CS00     = 0x1 // Clock Select0 bit 0
	TCCR0B_CS00_Msk = 0x1 // Clock Select0 bit 0

	// TCCR0A: Timer/Counter 0 Control Register A
	TCCR0A_TCW0      = 0x80 // Timer/Counter Width
	TCCR0A_TCW0_Msk  = 0x80 // Timer/Counter Width
	TCCR0A_ICEN0     = 0x40 // Input Capture Mode Enable
	TCCR0A_ICEN0_Msk = 0x40 // Input Capture Mode Enable
	TCCR0A_ICNC0     = 0x20 // Input Capture Noise Canceler
	TCCR0A_ICNC0_Msk = 0x20 // Input Capture Noise Canceler
	TCCR0A_ICES0     = 0x10 // Input Capture Edge Select
	TCCR0A_ICES0_Msk = 0x10 // Input Capture Edge Select
	TCCR0A_ICS0      = 0x8  // Input Capture Select
	TCCR0A_ICS0_Msk  = 0x8  // Input Capture Select
	TCCR0A_WGM00     = 0x1  // Waveform Generation Mode
	TCCR0A_WGM00_Msk = 0x1  // Waveform Generation Mode

	// OCR0A: Output Compare Register 0A
	OCR0A_OCR0A0    = 0x1  // Output Compare 0 A bits
	OCR0A_OCR0A1    = 0x2  // Output Compare 0 A bits
	OCR0A_OCR0A2    = 0x4  // Output Compare 0 A bits
	OCR0A_OCR0A3    = 0x8  // Output Compare 0 A bits
	OCR0A_OCR0A4    = 0x10 // Output Compare 0 A bits
	OCR0A_OCR0A5    = 0x20 // Output Compare 0 A bits
	OCR0A_OCR0A6    = 0x40 // Output Compare 0 A bits
	OCR0A_OCR0A7    = 0x80 // Output Compare 0 A bits
	OCR0A_OCR0A_Msk = 0xff // Output Compare 0 A bits

	// OCR0B: Output Compare Register B
	OCR0B_OCR0B0    = 0x1  // Output Compare 0 B bits
	OCR0B_OCR0B1    = 0x2  // Output Compare 0 B bits
	OCR0B_OCR0B2    = 0x4  // Output Compare 0 B bits
	OCR0B_OCR0B3    = 0x8  // Output Compare 0 B bits
	OCR0B_OCR0B4    = 0x10 // Output Compare 0 B bits
	OCR0B_OCR0B5    = 0x20 // Output Compare 0 B bits
	OCR0B_OCR0B6    = 0x40 // Output Compare 0 B bits
	OCR0B_OCR0B7    = 0x80 // Output Compare 0 B bits
	OCR0B_OCR0B_Msk = 0xff // Output Compare 0 B bits

	// TIMSK0: Timer/Counter Interrupt Mask Register
	TIMSK0_ICIE0      = 0x8 // Timer/Counter n Input Capture Interrupt Enable
	TIMSK0_ICIE0_Msk  = 0x8 // Timer/Counter n Input Capture Interrupt Enable
	TIMSK0_OCIE0B     = 0x4 // Timer/Counter0 Output Compare B Interrupt Enable
	TIMSK0_OCIE0B_Msk = 0x4 // Timer/Counter0 Output Compare B Interrupt Enable
	TIMSK0_OCIE0A     = 0x2 // Timer/Counter0 Output Compare A Interrupt Enable
	TIMSK0_OCIE0A_Msk = 0x2 // Timer/Counter0 Output Compare A Interrupt Enable
	TIMSK0_TOIE0      = 0x1 // Timer/Counter0 Overflow Interrupt Enable
	TIMSK0_TOIE0_Msk  = 0x1 // Timer/Counter0 Overflow Interrupt Enable

	// TIFR0: Timer/Counter Interrupt Flag register
	TIFR0_ICF0      = 0x8 // Timer/Counter 0 Input Capture Flag
	TIFR0_ICF0_Msk  = 0x8 // Timer/Counter 0 Input Capture Flag
	TIFR0_OCF0B     = 0x4 // Timer/Counter0 Output Compare Flag B
	TIFR0_OCF0B_Msk = 0x4 // Timer/Counter0 Output Compare Flag B
	TIFR0_OCF0A     = 0x2 // Timer/Counter0 Output Compare Flag A
	TIFR0_OCF0A_Msk = 0x2 // Timer/Counter0 Output Compare Flag A
	TIFR0_TOV0      = 0x1 // Timer/Counter0 Overflow Flag
	TIFR0_TOV0_Msk  = 0x1 // Timer/Counter0 Overflow Flag
)

// Bitfields for CELL_BALANCING: Cell Balancing
const (
	// CBCR: Cell Balancing Control Register
	CBCR_CBE0    = 0x1 // Cell Balancing Enables
	CBCR_CBE1    = 0x2 // Cell Balancing Enables
	CBCR_CBE2    = 0x4 // Cell Balancing Enables
	CBCR_CBE3    = 0x8 // Cell Balancing Enables
	CBCR_CBE_Msk = 0xf // Cell Balancing Enables
)

// Bitfields for BATTERY_PROTECTION: Battery Protection
const (
	// BPPLR: Battery Protection Parameter Lock Register
	BPPLR_BPPLE     = 0x2 // Battery Protection Parameter Lock Enable
	BPPLR_BPPLE_Msk = 0x2 // Battery Protection Parameter Lock Enable
	BPPLR_BPPL      = 0x1 // Battery Protection Parameter Lock
	BPPLR_BPPL_Msk  = 0x1 // Battery Protection Parameter Lock

	// BPCR: Battery Protection Control Register
	BPCR_EPID     = 0x20 // External Protection Input Disable
	BPCR_EPID_Msk = 0x20 // External Protection Input Disable
	BPCR_SCD      = 0x10 // Short Circuit Protection Disabled
	BPCR_SCD_Msk  = 0x10 // Short Circuit Protection Disabled
	BPCR_DOCD     = 0x8  // Discharge Over-current Protection Disabled
	BPCR_DOCD_Msk = 0x8  // Discharge Over-current Protection Disabled
	BPCR_COCD     = 0x4  // Charge Over-current Protection Disabled
	BPCR_COCD_Msk = 0x4  // Charge Over-current Protection Disabled
	BPCR_DHCD     = 0x2  // Discharge High-current Protection Disable
	BPCR_DHCD_Msk = 0x2  // Discharge High-current Protection Disable
	BPCR_CHCD     = 0x1  // Charge High-current Protection Disable
	BPCR_CHCD_Msk = 0x1  // Charge High-current Protection Disable

	// BPHCTR: Battery Protection Short-current Timing Register
	BPHCTR_HCPT0    = 0x1  // Battery Protection Short-current Timing bits
	BPHCTR_HCPT1    = 0x2  // Battery Protection Short-current Timing bits
	BPHCTR_HCPT2    = 0x4  // Battery Protection Short-current Timing bits
	BPHCTR_HCPT3    = 0x8  // Battery Protection Short-current Timing bits
	BPHCTR_HCPT4    = 0x10 // Battery Protection Short-current Timing bits
	BPHCTR_HCPT5    = 0x20 // Battery Protection Short-current Timing bits
	BPHCTR_HCPT_Msk = 0x3f // Battery Protection Short-current Timing bits

	// BPOCTR: Battery Protection Over-current Timing Register
	BPOCTR_OCPT0    = 0x1  // Battery Protection Over-current Timing bits
	BPOCTR_OCPT1    = 0x2  // Battery Protection Over-current Timing bits
	BPOCTR_OCPT2    = 0x4  // Battery Protection Over-current Timing bits
	BPOCTR_OCPT3    = 0x8  // Battery Protection Over-current Timing bits
	BPOCTR_OCPT4    = 0x10 // Battery Protection Over-current Timing bits
	BPOCTR_OCPT5    = 0x20 // Battery Protection Over-current Timing bits
	BPOCTR_OCPT_Msk = 0x3f // Battery Protection Over-current Timing bits

	// BPSCTR: Battery Protection Short-current Timing Register
	BPSCTR_SCPT0    = 0x1  // Battery Protection Short-current Timing bits
	BPSCTR_SCPT1    = 0x2  // Battery Protection Short-current Timing bits
	BPSCTR_SCPT2    = 0x4  // Battery Protection Short-current Timing bits
	BPSCTR_SCPT3    = 0x8  // Battery Protection Short-current Timing bits
	BPSCTR_SCPT4    = 0x10 // Battery Protection Short-current Timing bits
	BPSCTR_SCPT5    = 0x20 // Battery Protection Short-current Timing bits
	BPSCTR_SCPT6    = 0x40 // Battery Protection Short-current Timing bits
	BPSCTR_SCPT_Msk = 0x7f // Battery Protection Short-current Timing bits

	// BPCHCD: Battery Protection Charge-High-current Detection Level Register
	BPCHCD_CHCDL0    = 0x1  // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL1    = 0x2  // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL2    = 0x4  // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL3    = 0x8  // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL4    = 0x10 // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL5    = 0x20 // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL6    = 0x40 // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL7    = 0x80 // Battery Protection Charge-High-current Detection Level bits
	BPCHCD_CHCDL_Msk = 0xff // Battery Protection Charge-High-current Detection Level bits

	// BPDHCD: Battery Protection Discharge-High-current Detection Level Register
	BPDHCD_DHCDL0    = 0x1  // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL1    = 0x2  // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL2    = 0x4  // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL3    = 0x8  // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL4    = 0x10 // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL5    = 0x20 // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL6    = 0x40 // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL7    = 0x80 // Battery Protection Discharge-High-current Detection Level bits
	BPDHCD_DHCDL_Msk = 0xff // Battery Protection Discharge-High-current Detection Level bits

	// BPCOCD: Battery Protection Charge-Over-current Detection Level Register
	BPCOCD_COCDL0    = 0x1  // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL1    = 0x2  // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL2    = 0x4  // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL3    = 0x8  // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL4    = 0x10 // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL5    = 0x20 // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL6    = 0x40 // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL7    = 0x80 // Battery Protection Charge-Over-current Detection Level bits
	BPCOCD_COCDL_Msk = 0xff // Battery Protection Charge-Over-current Detection Level bits

	// BPDOCD: Battery Protection Discharge-Over-current Detection Level Register
	BPDOCD_DOCDL0    = 0x1  // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL1    = 0x2  // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL2    = 0x4  // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL3    = 0x8  // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL4    = 0x10 // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL5    = 0x20 // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL6    = 0x40 // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL7    = 0x80 // Battery Protection Discharge-Over-current Detection Level bits
	BPDOCD_DOCDL_Msk = 0xff // Battery Protection Discharge-Over-current Detection Level bits

	// BPSCD: Battery Protection Short-Circuit Detection Level Register
	BPSCD_SCDL0    = 0x1  // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL1    = 0x2  // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL2    = 0x4  // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL3    = 0x8  // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL4    = 0x10 // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL5    = 0x20 // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL6    = 0x40 // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL7    = 0x80 // Battery Protection Short-Circuit Detection Level Register bits
	BPSCD_SCDL_Msk = 0xff // Battery Protection Short-Circuit Detection Level Register bits

	// BPIFR: Battery Protection Interrupt Flag Register
	BPIFR_SCIF      = 0x10 // Short-circuit Protection Activated Interrupt Flag
	BPIFR_SCIF_Msk  = 0x10 // Short-circuit Protection Activated Interrupt Flag
	BPIFR_DOCIF     = 0x8  // Discharge Over-current Protection Activated Interrupt Flag
	BPIFR_DOCIF_Msk = 0x8  // Discharge Over-current Protection Activated Interrupt Flag
	BPIFR_COCIF     = 0x4  // Charge Over-current Protection Activated Interrupt Flag
	BPIFR_COCIF_Msk = 0x4  // Charge Over-current Protection Activated Interrupt Flag
	BPIFR_DHCIF     = 0x2  // Disharge High-current Protection Activated Interrupt
	BPIFR_DHCIF_Msk = 0x2  // Disharge High-current Protection Activated Interrupt
	BPIFR_CHCIF     = 0x1  // Charge High-current Protection Activated Interrupt
	BPIFR_CHCIF_Msk = 0x1  // Charge High-current Protection Activated Interrupt

	// BPIMSK: Battery Protection Interrupt Mask Register
	BPIMSK_SCIE      = 0x10 // Short-circuit Protection Activated Interrupt Enable
	BPIMSK_SCIE_Msk  = 0x10 // Short-circuit Protection Activated Interrupt Enable
	BPIMSK_DOCIE     = 0x8  // Discharge Over-current Protection Activated Interrupt Enable
	BPIMSK_DOCIE_Msk = 0x8  // Discharge Over-current Protection Activated Interrupt Enable
	BPIMSK_COCIE     = 0x4  // Charge Over-current Protection Activated Interrupt Enable
	BPIMSK_COCIE_Msk = 0x4  // Charge Over-current Protection Activated Interrupt Enable
	BPIMSK_DHCIE     = 0x2  // Discharger High-current Protection Activated Interrupt
	BPIMSK_DHCIE_Msk = 0x2  // Discharger High-current Protection Activated Interrupt
	BPIMSK_CHCIE     = 0x1  // Charger High-current Protection Activated Interrupt
	BPIMSK_CHCIE_Msk = 0x1  // Charger High-current Protection Activated Interrupt
)

// Bitfields for CHARGER_DETECT: Charger Detect
const (
	// CHGDCSR: Charger Detect Control and Status Register
	CHGDCSR_BATTPVL     = 0x10 // BATT Pin Voltage Level
	CHGDCSR_BATTPVL_Msk = 0x10 // BATT Pin Voltage Level
	CHGDCSR_CHGDISC0    = 0x4  // Charger Detect Interrupt Sense Control
	CHGDCSR_CHGDISC1    = 0x8  // Charger Detect Interrupt Sense Control
	CHGDCSR_CHGDISC_Msk = 0xc  // Charger Detect Interrupt Sense Control
	CHGDCSR_CHGDIF      = 0x2  // Charger Detect Interrupt Flag
	CHGDCSR_CHGDIF_Msk  = 0x2  // Charger Detect Interrupt Flag
	CHGDCSR_CHGDIE      = 0x1  // Charger Detect Interrupt Enable
	CHGDCSR_CHGDIE_Msk  = 0x1  // Charger Detect Interrupt Enable
)

// Bitfields for VOLTAGE_REGULATOR: Voltage Regulator
const (
	// ROCR: Regulator Operating Condition Register
	ROCR_ROCS       = 0x80 // ROC Status
	ROCR_ROCS_Msk   = 0x80 // ROC Status
	ROCR_ROCD       = 0x10 // ROC Disable
	ROCR_ROCD_Msk   = 0x10 // ROC Disable
	ROCR_ROCWIF     = 0x2  // ROC Warning Interrupt Flag
	ROCR_ROCWIF_Msk = 0x2  // ROC Warning Interrupt Flag
	ROCR_ROCWIE     = 0x1  // ROC Warning Interrupt Enable
	ROCR_ROCWIE_Msk = 0x1  // ROC Warning Interrupt Enable
)

// Bitfields for BANDGAP: Bandgap
const (
	// BGCSR: Bandgap Control and Status Register
	BGCSR_BGD         = 0x20 // Bandgap Disable
	BGCSR_BGD_Msk     = 0x20 // Bandgap Disable
	BGCSR_BGSCDE      = 0x10 // Bandgap Short Circuit Detection Enabled
	BGCSR_BGSCDE_Msk  = 0x10 // Bandgap Short Circuit Detection Enabled
	BGCSR_BGSCDIF     = 0x2  // Bandgap Short Circuit Detection Interrupt Flag
	BGCSR_BGSCDIF_Msk = 0x2  // Bandgap Short Circuit Detection Interrupt Flag
	BGCSR_BGSCDIE     = 0x1  // Bandgap Short Circuit Detection Interrupt Enable
	BGCSR_BGSCDIE_Msk = 0x1  // Bandgap Short Circuit Detection Interrupt Enable

	// BGCRR: Bandgap Calibration of Resistor Ladder
	BGCRR_BGCR0    = 0x1  // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR1    = 0x2  // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR2    = 0x4  // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR3    = 0x8  // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR4    = 0x10 // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR5    = 0x20 // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR6    = 0x40 // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR7    = 0x80 // Bandgap Calibration of Resistor Ladder Bits
	BGCRR_BGCR_Msk = 0xff // Bandgap Calibration of Resistor Ladder Bits

	// BGCCR: Bandgap Calibration Register
	BGCCR_BGCC0    = 0x1  // BG Calibration of PTAT Current Bits
	BGCCR_BGCC1    = 0x2  // BG Calibration of PTAT Current Bits
	BGCCR_BGCC2    = 0x4  // BG Calibration of PTAT Current Bits
	BGCCR_BGCC3    = 0x8  // BG Calibration of PTAT Current Bits
	BGCCR_BGCC4    = 0x10 // BG Calibration of PTAT Current Bits
	BGCCR_BGCC5    = 0x20 // BG Calibration of PTAT Current Bits
	BGCCR_BGCC_Msk = 0x3f // BG Calibration of PTAT Current Bits
)

// Bitfields for CPU: CPU Registers
const (
	// SREG: Status Register
	SREG_I     = 0x80 // Global Interrupt Enable
	SREG_I_Msk = 0x80 // Global Interrupt Enable
	SREG_T     = 0x40 // Bit Copy Storage
	SREG_T_Msk = 0x40 // Bit Copy Storage
	SREG_H     = 0x20 // Half Carry Flag
	SREG_H_Msk = 0x20 // Half Carry Flag
	SREG_S     = 0x10 // Sign Bit
	SREG_S_Msk = 0x10 // Sign Bit
	SREG_V     = 0x8  // Two's Complement Overflow Flag
	SREG_V_Msk = 0x8  // Two's Complement Overflow Flag
	SREG_N     = 0x4  // Negative Flag
	SREG_N_Msk = 0x4  // Negative Flag
	SREG_Z     = 0x2  // Zero Flag
	SREG_Z_Msk = 0x2  // Zero Flag
	SREG_C     = 0x1  // Carry Flag
	SREG_C_Msk = 0x1  // Carry Flag

	// MCUCR: MCU Control Register
	MCUCR_CKOE      = 0x20 // Clock Output Enable
	MCUCR_CKOE_Msk  = 0x20 // Clock Output Enable
	MCUCR_PUD       = 0x10 // Pull-up disable
	MCUCR_PUD_Msk   = 0x10 // Pull-up disable
	MCUCR_IVSEL     = 0x2  // Interrupt Vector Select
	MCUCR_IVSEL_Msk = 0x2  // Interrupt Vector Select
	MCUCR_IVCE      = 0x1  // Interrupt Vector Change Enable
	MCUCR_IVCE_Msk  = 0x1  // Interrupt Vector Change Enable

	// MCUSR: MCU Status Register
	MCUSR_OCDRF     = 0x10 // OCD Reset Flag
	MCUSR_OCDRF_Msk = 0x10 // OCD Reset Flag
	MCUSR_WDRF      = 0x8  // Watchdog Reset Flag
	MCUSR_WDRF_Msk  = 0x8  // Watchdog Reset Flag
	MCUSR_BODRF     = 0x4  // Brown-out Reset Flag
	MCUSR_BODRF_Msk = 0x4  // Brown-out Reset Flag
	MCUSR_EXTRF     = 0x2  // External Reset Flag
	MCUSR_EXTRF_Msk = 0x2  // External Reset Flag
	MCUSR_PORF      = 0x1  // Power-on reset flag
	MCUSR_PORF_Msk  = 0x1  // Power-on reset flag

	// FOSCCAL: Fast Oscillator Calibration Value
	FOSCCAL_FCAL0    = 0x1  // Fast Oscillator Calibration Value
	FOSCCAL_FCAL1    = 0x2  // Fast Oscillator Calibration Value
	FOSCCAL_FCAL2    = 0x4  // Fast Oscillator Calibration Value
	FOSCCAL_FCAL3    = 0x8  // Fast Oscillator Calibration Value
	FOSCCAL_FCAL4    = 0x10 // Fast Oscillator Calibration Value
	FOSCCAL_FCAL5    = 0x20 // Fast Oscillator Calibration Value
	FOSCCAL_FCAL6    = 0x40 // Fast Oscillator Calibration Value
	FOSCCAL_FCAL7    = 0x80 // Fast Oscillator Calibration Value
	FOSCCAL_FCAL_Msk = 0xff // Fast Oscillator Calibration Value

	// OSICSR: Oscillator Sampling Interface Control and Status Register
	OSICSR_OSISEL0     = 0x10 // Oscillator Sampling Interface Select 0
	OSICSR_OSISEL0_Msk = 0x10 // Oscillator Sampling Interface Select 0
	OSICSR_OSIST       = 0x2  // Oscillator Sampling Interface Status
	OSICSR_OSIST_Msk   = 0x2  // Oscillator Sampling Interface Status
	OSICSR_OSIEN       = 0x1  // Oscillator Sampling Interface Enable
	OSICSR_OSIEN_Msk   = 0x1  // Oscillator Sampling Interface Enable

	// SMCR: Sleep Mode Control Register
	SMCR_SM0    = 0x2 // Sleep Mode Select bits
	SMCR_SM1    = 0x4 // Sleep Mode Select bits
	SMCR_SM2    = 0x8 // Sleep Mode Select bits
	SMCR_SM_Msk = 0xe // Sleep Mode Select bits
	SMCR_SE     = 0x1 // Sleep Enable
	SMCR_SE_Msk = 0x1 // Sleep Enable

	// GPIOR2: General Purpose IO Register 2
	GPIOR2_GPIOR20    = 0x1  // General Purpose IO bits
	GPIOR2_GPIOR21    = 0x2  // General Purpose IO bits
	GPIOR2_GPIOR22    = 0x4  // General Purpose IO bits
	GPIOR2_GPIOR23    = 0x8  // General Purpose IO bits
	GPIOR2_GPIOR24    = 0x10 // General Purpose IO bits
	GPIOR2_GPIOR25    = 0x20 // General Purpose IO bits
	GPIOR2_GPIOR26    = 0x40 // General Purpose IO bits
	GPIOR2_GPIOR27    = 0x80 // General Purpose IO bits
	GPIOR2_GPIOR2_Msk = 0xff // General Purpose IO bits

	// GPIOR1: General Purpose IO Register 1
	GPIOR1_GPIOR10    = 0x1  // General Purpose IO bits
	GPIOR1_GPIOR11    = 0x2  // General Purpose IO bits
	GPIOR1_GPIOR12    = 0x4  // General Purpose IO bits
	GPIOR1_GPIOR13    = 0x8  // General Purpose IO bits
	GPIOR1_GPIOR14    = 0x10 // General Purpose IO bits
	GPIOR1_GPIOR15    = 0x20 // General Purpose IO bits
	GPIOR1_GPIOR16    = 0x40 // General Purpose IO bits
	GPIOR1_GPIOR17    = 0x80 // General Purpose IO bits
	GPIOR1_GPIOR1_Msk = 0xff // General Purpose IO bits

	// GPIOR0: General Purpose IO Register 0
	GPIOR0_GPIOR00    = 0x1  // General Purpose IO bits
	GPIOR0_GPIOR01    = 0x2  // General Purpose IO bits
	GPIOR0_GPIOR02    = 0x4  // General Purpose IO bits
	GPIOR0_GPIOR03    = 0x8  // General Purpose IO bits
	GPIOR0_GPIOR04    = 0x10 // General Purpose IO bits
	GPIOR0_GPIOR05    = 0x20 // General Purpose IO bits
	GPIOR0_GPIOR06    = 0x40 // General Purpose IO bits
	GPIOR0_GPIOR07    = 0x80 // General Purpose IO bits
	GPIOR0_GPIOR0_Msk = 0xff // General Purpose IO bits

	// DIDR0: Digital Input Disable Register
	DIDR0_PA1DID     = 0x2 // When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled.
	DIDR0_PA1DID_Msk = 0x2 // When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled.
	DIDR0_PA0DID     = 0x1 // When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled.
	DIDR0_PA0DID_Msk = 0x1 // When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled.

	// PRR0: Power Reduction Register 0
	PRR0_PRTWI      = 0x40 // Power Reduction TWI
	PRR0_PRTWI_Msk  = 0x40 // Power Reduction TWI
	PRR0_PRVRM      = 0x20 // Power Reduction Voltage Regulator Monitor
	PRR0_PRVRM_Msk  = 0x20 // Power Reduction Voltage Regulator Monitor
	PRR0_PRSPI      = 0x8  // Power reduction SPI
	PRR0_PRSPI_Msk  = 0x8  // Power reduction SPI
	PRR0_PRTIM1     = 0x4  // Power Reduction Timer/Counter1
	PRR0_PRTIM1_Msk = 0x4  // Power Reduction Timer/Counter1
	PRR0_PRTIM0     = 0x2  // Power Reduction Timer/Counter0
	PRR0_PRTIM0_Msk = 0x2  // Power Reduction Timer/Counter0
	PRR0_PRVADC     = 0x1  // Power Reduction V-ADC
	PRR0_PRVADC_Msk = 0x1  // Power Reduction V-ADC

	// CLKPR: Clock Prescale Register
	CLKPR_CLKPCE     = 0x80 // Clock Prescaler Change Enable
	CLKPR_CLKPCE_Msk = 0x80 // Clock Prescaler Change Enable
	CLKPR_CLKPS0     = 0x1  // Clock Prescaler Select Bits
	CLKPR_CLKPS1     = 0x2  // Clock Prescaler Select Bits
	CLKPR_CLKPS_Msk  = 0x3  // Clock Prescaler Select Bits
)

// Bitfields for BOOT_LOAD: Bootloader
const (
	// SPMCSR: Store Program Memory Control and Status Register
	SPMCSR_SPMIE      = 0x80 // SPM Interrupt Enable
	SPMCSR_SPMIE_Msk  = 0x80 // SPM Interrupt Enable
	SPMCSR_RWWSB      = 0x40 // Read-While-Write Section Busy
	SPMCSR_RWWSB_Msk  = 0x40 // Read-While-Write Section Busy
	SPMCSR_SIGRD      = 0x20 // Signature Row Read
	SPMCSR_SIGRD_Msk  = 0x20 // Signature Row Read
	SPMCSR_RWWSRE     = 0x10 // Read-While-Write Section Read Enable
	SPMCSR_RWWSRE_Msk = 0x10 // Read-While-Write Section Read Enable
	SPMCSR_LBSET      = 0x8  // Lock Bit Set
	SPMCSR_LBSET_Msk  = 0x8  // Lock Bit Set
	SPMCSR_PGWRT      = 0x4  // Page Write
	SPMCSR_PGWRT_Msk  = 0x4  // Page Write
	SPMCSR_PGERS      = 0x2  // Page Erase
	SPMCSR_PGERS_Msk  = 0x2  // Page Erase
	SPMCSR_SPMEN      = 0x1  // Store Program Memory Enable
	SPMCSR_SPMEN_Msk  = 0x1  // Store Program Memory Enable
)
