// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-avr.go from ATtiny12.atdf, see http://packs.download.atmel.com/

//go:build avr && attiny12

// Device information for the ATtiny12.
package avr

import (
	"runtime/volatile"
	"unsafe"
)

// Some information about this device.
const (
	DEVICE = "ATtiny12"
	ARCH   = "AVR8"
	FAMILY = "tinyAVR"
)

// Interrupts
const (
	IRQ_RESET      = 0 // External Reset, Power-on Reset and Watchdog Reset
	IRQ_INT0       = 1 // External Interrupt 0
	IRQ_IO_PINS    = 2 // External Interrupt Request 0
	IRQ_TIMER0_OVF = 3 // Timer/Counter0 Overflow
	IRQ_EE_RDY     = 4 // EEPROM Ready
	IRQ_ANA_COMP   = 5 // Analog Comparator
	IRQ_max        = 5 // Highest interrupt number on this device.
)

// Pseudo function call that is replaced by the compiler with the actual
// functions registered through interrupt.New.
//
//go:linkname callHandlers runtime/interrupt.callHandlers
func callHandlers(num int)

//export __vector_RESET
//go:interrupt
func interruptRESET() {
	callHandlers(IRQ_RESET)
}

//export __vector_INT0
//go:interrupt
func interruptINT0() {
	callHandlers(IRQ_INT0)
}

//export __vector_IO_PINS
//go:interrupt
func interruptIO_PINS() {
	callHandlers(IRQ_IO_PINS)
}

//export __vector_TIMER0_OVF
//go:interrupt
func interruptTIMER0_OVF() {
	callHandlers(IRQ_TIMER0_OVF)
}

//export __vector_EE_RDY
//go:interrupt
func interruptEE_RDY() {
	callHandlers(IRQ_EE_RDY)
}

//export __vector_ANA_COMP
//go:interrupt
func interruptANA_COMP() {
	callHandlers(IRQ_ANA_COMP)
}

// Peripherals.
var (
	// Analog Comparator
	ACSR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))

	// CPU Registers
	SREG   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3f)))
	MCUCR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x35)))
	MCUSR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x34)))
	OSCCAL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x31)))

	// External Interrupts
	GIMSK = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3b)))
	GIFR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3a)))

	// EEPROM
	EEAR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1e)))
	EEDR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1d)))
	EECR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1c)))

	// I/O Port
	PORTB = (*volatile.Register8)(unsafe.Pointer(uintptr(0x18)))
	DDRB  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x17)))
	PINB  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x16)))

	// Timer/Counter, 8-bit
	TIMSK = (*volatile.Register8)(unsafe.Pointer(uintptr(0x39)))
	TIFR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x38)))
	TCCR0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x33)))
	TCNT0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x32)))

	// Watchdog Timer
	WDTCR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x21)))

	// Fuses
	LOW = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))

	// Lockbits
	LOCKBIT = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
)

// Bitfields for FUSE: Fuses
const (
	// LOW
	LOW_BODLEVEL     = 0x80 // Brown-out Detection Level
	LOW_BODLEVEL_Msk = 0x80 // Brown-out Detection Level
	LOW_BODEN        = 0x40 // Brown-out detection enabled
	LOW_BODEN_Msk    = 0x40 // Brown-out detection enabled
	LOW_SPIEN        = 0x20 // Serial program downloading (SPI) enabled
	LOW_SPIEN_Msk    = 0x20 // Serial program downloading (SPI) enabled
	LOW_RSTDISBL     = 0x10 // External reset function of PB5 disabled
	LOW_RSTDISBL_Msk = 0x10 // External reset function of PB5 disabled
	LOW_CKSEL0       = 0x1  // Clock Select
	LOW_CKSEL1       = 0x2  // Clock Select
	LOW_CKSEL2       = 0x4  // Clock Select
	LOW_CKSEL3       = 0x8  // Clock Select
	LOW_CKSEL_Msk    = 0xf  // Clock Select
)

// Bitfields for LOCKBIT: Lockbits
const (
	// LOCKBIT
	LOCKBIT_LB0    = 0x2 // Memory Lock
	LOCKBIT_LB1    = 0x4 // Memory Lock
	LOCKBIT_LB_Msk = 0x6 // Memory Lock
)

// Bitfields for AC: Analog Comparator
const (
	// ACSR: Analog Comparator Control And Status Register
	ACSR_ACD       = 0x80 // Analog Comparator Disable
	ACSR_ACD_Msk   = 0x80 // Analog Comparator Disable
	ACSR_AINBG     = 0x40 // Analog Comparator Bandgap Select
	ACSR_AINBG_Msk = 0x40 // Analog Comparator Bandgap Select
	ACSR_ACO       = 0x20 // Analog Comparator Output
	ACSR_ACO_Msk   = 0x20 // Analog Comparator Output
	ACSR_ACI       = 0x10 // Analog Comparator Interrupt Flag
	ACSR_ACI_Msk   = 0x10 // Analog Comparator Interrupt Flag
	ACSR_ACIE      = 0x8  // Analog Comparator Interrupt Enable
	ACSR_ACIE_Msk  = 0x8  // Analog Comparator Interrupt Enable
	ACSR_ACIS0     = 0x1  // Analog Comparator Interrupt Mode Select bits
	ACSR_ACIS1     = 0x2  // Analog Comparator Interrupt Mode Select bits
	ACSR_ACIS_Msk  = 0x3  // Analog Comparator Interrupt Mode Select bits
)

// Bitfields for CPU: CPU Registers
const (
	// SREG: Status Register
	SREG_I     = 0x80 // Global Interrupt Enable
	SREG_I_Msk = 0x80 // Global Interrupt Enable
	SREG_T     = 0x40 // Bit Copy Storage
	SREG_T_Msk = 0x40 // Bit Copy Storage
	SREG_H     = 0x20 // Half Carry Flag
	SREG_H_Msk = 0x20 // Half Carry Flag
	SREG_S     = 0x10 // Sign Bit
	SREG_S_Msk = 0x10 // Sign Bit
	SREG_V     = 0x8  // Two's Complement Overflow Flag
	SREG_V_Msk = 0x8  // Two's Complement Overflow Flag
	SREG_N     = 0x4  // Negative Flag
	SREG_N_Msk = 0x4  // Negative Flag
	SREG_Z     = 0x2  // Zero Flag
	SREG_Z_Msk = 0x2  // Zero Flag
	SREG_C     = 0x1  // Carry Flag
	SREG_C_Msk = 0x1  // Carry Flag

	// MCUCR: MCU Control Register
	MCUCR_PUD      = 0x40 // Pull-up Disable
	MCUCR_PUD_Msk  = 0x40 // Pull-up Disable
	MCUCR_SE       = 0x20 // Sleep Enable
	MCUCR_SE_Msk   = 0x20 // Sleep Enable
	MCUCR_SM       = 0x10 // Sleep Mode
	MCUCR_SM_Msk   = 0x10 // Sleep Mode
	MCUCR_ISC00    = 0x1  // Interrupt Sense Control 0 bits
	MCUCR_ISC01    = 0x2  // Interrupt Sense Control 0 bits
	MCUCR_ISC0_Msk = 0x3  // Interrupt Sense Control 0 bits

	// MCUSR: MCU Status register
	MCUSR_WDRF      = 0x8 // Watchdog Reset Flag
	MCUSR_WDRF_Msk  = 0x8 // Watchdog Reset Flag
	MCUSR_BORF      = 0x4 // Brown-out Reset Flag
	MCUSR_BORF_Msk  = 0x4 // Brown-out Reset Flag
	MCUSR_EXTRF     = 0x2 // External Reset Flag
	MCUSR_EXTRF_Msk = 0x2 // External Reset Flag
	MCUSR_PORF      = 0x1 // Power-On Reset Flag
	MCUSR_PORF_Msk  = 0x1 // Power-On Reset Flag

	// OSCCAL: Status Register
	OSCCAL_OSCCAL0    = 0x1  // Oscillator Calibration
	OSCCAL_OSCCAL1    = 0x2  // Oscillator Calibration
	OSCCAL_OSCCAL2    = 0x4  // Oscillator Calibration
	OSCCAL_OSCCAL3    = 0x8  // Oscillator Calibration
	OSCCAL_OSCCAL4    = 0x10 // Oscillator Calibration
	OSCCAL_OSCCAL5    = 0x20 // Oscillator Calibration
	OSCCAL_OSCCAL6    = 0x40 // Oscillator Calibration
	OSCCAL_OSCCAL7    = 0x80 // Oscillator Calibration
	OSCCAL_OSCCAL_Msk = 0xff // Oscillator Calibration
)

// Bitfields for EXINT: External Interrupts
const (
	// GIMSK: General Interrupt Mask Register
	GIMSK_INT0     = 0x40 // External Interrupt Request 0 Enable
	GIMSK_INT0_Msk = 0x40 // External Interrupt Request 0 Enable
	GIMSK_PCIE     = 0x20 // Pin Change Interrupt Enable
	GIMSK_PCIE_Msk = 0x20 // Pin Change Interrupt Enable

	// GIFR: General Interrupt Flag register
	GIFR_INTF0     = 0x40 // External Interrupt Flag 0
	GIFR_INTF0_Msk = 0x40 // External Interrupt Flag 0
	GIFR_PCIF      = 0x20 // Pin Change Interrupt Flag
	GIFR_PCIF_Msk  = 0x20 // Pin Change Interrupt Flag
)

// Bitfields for EEPROM: EEPROM
const (
	// EECR: EEPROM Control Register
	EECR_EERIE     = 0x8 // EEProm Ready Interrupt Enable
	EECR_EERIE_Msk = 0x8 // EEProm Ready Interrupt Enable
	EECR_EEMWE     = 0x4 // EEPROM Master Write Enable
	EECR_EEMWE_Msk = 0x4 // EEPROM Master Write Enable
	EECR_EEWE      = 0x2 // EEPROM Write Enable
	EECR_EEWE_Msk  = 0x2 // EEPROM Write Enable
	EECR_EERE      = 0x1 // EEPROM Read Enable
	EECR_EERE_Msk  = 0x1 // EEPROM Read Enable
)

// Bitfields for TC0: Timer/Counter, 8-bit
const (
	// TIMSK: Timer/Counter Interrupt Mask Register
	TIMSK_TOIE0     = 0x2 // Timer/Counter0 Overflow Interrupt Enable
	TIMSK_TOIE0_Msk = 0x2 // Timer/Counter0 Overflow Interrupt Enable

	// TIFR: Timer/Counter Interrupt Flag register
	TIFR_TOV0     = 0x2 // Timer/Counter0 Overflow Flag
	TIFR_TOV0_Msk = 0x2 // Timer/Counter0 Overflow Flag

	// TCCR0: Timer/Counter0 Control Register
	TCCR0_CS02     = 0x4 // Clock Select0 bit 2
	TCCR0_CS02_Msk = 0x4 // Clock Select0 bit 2
	TCCR0_CS01     = 0x2 // Clock Select0 bit 1
	TCCR0_CS01_Msk = 0x2 // Clock Select0 bit 1
	TCCR0_CS00     = 0x1 // Clock Select0 bit 0
	TCCR0_CS00_Msk = 0x1 // Clock Select0 bit 0
)

// Bitfields for WDT: Watchdog Timer
const (
	// WDTCR: Watchdog Timer Control Register
	WDTCR_WDTOE     = 0x10 // RW
	WDTCR_WDTOE_Msk = 0x10 // RW
	WDTCR_WDE       = 0x8  // Watch Dog Enable
	WDTCR_WDE_Msk   = 0x8  // Watch Dog Enable
	WDTCR_WDP0      = 0x1  // Watch Dog Timer Prescaler bits
	WDTCR_WDP1      = 0x2  // Watch Dog Timer Prescaler bits
	WDTCR_WDP2      = 0x4  // Watch Dog Timer Prescaler bits
	WDTCR_WDP_Msk   = 0x7  // Watch Dog Timer Prescaler bits
)
